1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuits; more specifically, it relates to a fuse for semiconductor integrated circuits and the method of fabricating said fuse.
2. Background of the Invention
Semiconductor integrated circuits include a semiconductor substrate containing active devices, such as transistors and diodes, passive devices, such as capacitors and resistors and interconnection layers formed on top of the substrate containing wires for joining the active and passive devices into integrated circuits.
Many semiconductor devices such as logic circuits such as complementary metal-oxide-silicon (CMOS), Bipolar, and BiCMOS and memory devices such as dynamic random access memory (DRAMs) and static random access memory (SRAMs) are designed to be tailored after manufacture by “blowing fuses” (deleting fuses.) Tailoring includes adjusting circuit parameters and deleting failed circuit elements and replacing them with redundant circuit elements.
Fuses are usually formed from narrow wires in the interconnection layers designed to be opened by vaporizing a portion of the wire by either passing an electric current through the fuse or now more commonly by a laser pulse. Modern semiconductor integrated circuits often require many thousands of fuses arranged in closely spaced banks. Fuses are most often located in the uppermost interconnection wiring levels in order to minimize damage to adjoining structures, to minimize the thickness of dielectric passivation covering the fuse and to allow an optically clear path for a laser to the fuse.
Many semiconductor integrated circuits use a hierarchical wiring scheme; thin, tight pitched wiring in lower wiring levels for performance purposes and thick, relaxed pitch wiring in higher wiring levels for current carrying requirements. Fuses fabricated in these higher wiring levels being formed of thick metal require high fuse energy to vaporize than fuses formed in thin wiring levels. Since fuses generally must be formed in upper levels of wiring for the reasons given above a difficult problem is created. The high power, for example of a laser, required to delete thick fuses can create similar collateral damage to adjoining fuses and wires (resulting in reduced yields) as well as create cracks and craters in the dielectric layers separating wiring levels (resulting in reliability problems) that locating the fuse in lower wiring levels can cause. Further, thick fuses must often be spaced wide apart to reduce these problems resulting in an excessive area of the die being required for fuses.
Dielectric damage is also a great concern when low-k dielectric materials are used between wiring levels. Low-k dielectrics are generally not thermally stable, have a low modulus and can melt, deform, or collapse when subjected to thermal and mechanical stress, such as induced by fuse blow. Examples of low-k dielectrics include spin on glass, porous silicon oxide, polyimide, polyimide siloxane, polysilsequioxane polymer, benzocyclobutene, paralyene, polyolefin, poly-naphthalene, amorphous Teflon (a fluropolymer resin), SiLK™ (a polyphenylene oligomer and described in U.S. Pat. No. 5,965,679) manufactured by Dow Chemical, Midland, Mich., Black Diamond™ (silica doped with about 10 mole % methane), manufactured by Applied Materials Corp., polymer foam and aerogel. Common dielectrics include silicon oxide, silicon nitride, diamond, and fluorine doped silicon oxide.